1. Field of the Invention
The present invention relates to a semiconductor integrated circuit that can be set to a standby state to reduce power consumption.
2. Related Art
Due to advances in integrated-circuit technology, memory-embedded system LYSIs have spread in which a memory and other various kinds of circuits are embedded in the same semiconductor chip. In particular, in recent years, system LSIs with a built-in electrically rewritable flash memory have been widely used.
In addition to a memory, a sense amplifier for reading out data from the memory is provided in system LSI. The sense amplifier senses a potential difference between a bit-line potential and a potential of the reference bit line.
Some of memory-embedded system LSIs of this kind are enabled to be set to a standby state (refer to “Semiconductor MOS Memory and Usage Thereof” by Yasoji Suzuki, 1st copy/1st edition, published by “Nikkan Kogyo Newspaper Co., Ltd., Aug. 30, 1990). When being set to the standby state, the system LSI suspends its internal operation, whereby the power consumption can be reduced.
However, in this kind of conventional system LSIs having the standby state, it has been a problem that, immediately after the LSI is released from the standby state, a penetrating current flows by way of the bit line and the reference bit line from the power source to the ground, whereby power consumption increases.
In a system LSI with a built-in flash memory, when a penetrating current flows, the electric potential of the bit line fluctuates; therefore, a soft error may occur in which erroneous data is written in a floating gate of the flash memory.